D2S Introduces TrueMask Mask-Wafer Simulation Tool
By David Lammers
D2S, Inc. has introduced a mask-wafer double simulation tool which employs the graphical acceleration capabilities delivered by GPU-enhanced workstations.
Aki Fujimura
Introduced at the Bacus mask technology conference going on this week in California, the TrueMask DS tool is aimed at mask shops, engineers implementing optical proximity correction (OPC) features, and IC designers, said CEO Aki Fujimura.
Sub-resolution assist features (SRAFs), used to boost the energy received at the wafer level, are become more curvilinear and thus harder for the variable-shaped beam (VSB) e-beam mask writers to handle. “For a long time, e-beam writing has been so accurate. Engineers could assume that what you ask the mask writer to do will be what is on the mask. That is no longer the case when shapes are less than 80nm and more curvilinear,” said Fujimura.
At the 20 nm node, and even at the 28nm node, design teams need to evaluate the mask features at the wafer plane, and mask shops need to understand wafer-level effects as well. Previous efforts to do that involved lithography simulation with estimations (corner rounding) of the impact at the wafer level. That bundled model is running out of steam, he said.
Mask shapes have to be simulated to understand what is going to happen on the wafer. First, the curvilinear mask shapes are simulated. As the simulated light source projects the shape on to the wafer surface, TrueMask DS creates an energy intensity map received by the wafer.
“As (SRAF) features become smaller than 80nm, engineers must understand what is going to print on the wafer. They must simulate what is on the mask, then simulate at the wafer level. The industry started with the bundled model, and now goes to a separated model with double simulation tools,” he said.
The D2S team built graphical acceleration into the TrueMask DS tool. Nvidia Inc. supports engineering applications, and modern graphics processing units (GPUs) are essential for interactive simulations. Fujimura said the what would take hours of compute time with conventional approaches can be reduced to tens of seconds with TruMask DS running on a graphics workstation.
Mask shapes are becoming more complicated at 20nm. (Source: IBM)
“The user experience is totally different,” he said. “The amount of space the designers can explore is much different. If you try to give a curvilinear shape in a conventional simulation program for a 5µm by 5µm area on the wafer, it will take hours and hours. With our GPU accelerated simulation engines we can do this in tens of seconds. There is a big difference from an engineer’s perspective. It provides an interactive space in which the engineer can explore in interactive time.”
Engineers can change the shapes in an exploratory manner, which he said can make a major difference in the “amount of completeness or thoroughness the engineer can explore.”
A slightly different shape, with perhaps a one shot increase on the mask, can make a major difference at the wafer level. With a double simulation tool, engineers can explore the tradeoffs of what is happening on the mask and what is happening on the wafer, he said.
Source: Handel Jones, IBS, Inc.
TrueMask DS arrives as mask complexity is exploding. Double patterning at critical layers is required in order to accommodate the SRAF features, which involve increasingly complex shapes. Some companies have publicly discussed the need for quintuple (5x) patterning. With SRAF complexity in some case going up by five times, and as many as five masks required to write one layer on the wafer, mask complexity can increase by 5X to 25X.
D2S started nine years ago with direct write lithography as its main market. Fujimura, who earlier worked in technical roles at Cadence Design, said the underlying physics of the VSB e-beam machines is the same for both direct write e-beam lithography and for mask writing. The D2S engineering team spent about three years on TrueMask DS, he said, and has a number of already-granted patents.
Because mask dimension are four times what appears on the wafer, he said the direct-write lithography community faced the accuracy challenge much earlier than the mask-writing sector. That gave D2S a head start on solving the simulation problems now faced at the mask level, including corrective technologies.
“Two generations later, the same problems we see in direct write we see on the masks. We prepared for this a long time ago,” he said.
Franklin Kalk, chief technology officer at Toppan Photomasks in Round Rock, Texas, said the TrueMask software offers features not seen to date. “In a small 5 by 5 micron area, you can change the size of the assist features and see how that works as a printed feature on the wafer. We have not seen that in the past, and it is pretty neat,” Kalk said. The tool is also helpful in identifying hot spots in local areas, he added.
September 21st, 2011 at 10:57 pm
I don’t think the mask shops need to understand wafer effects. It is the wafer fabs that need to understand everything. The mask shops need to deliver a consistent result that is well characterized and communicated to the wafer fabs. The mask shops will never have the information required to understand the wafer process, and the fabs want to keep it that way.
Also, regarding the claims about an ability to do interactive aerial lithography simulations: aerial image only simulations, without the resist, are only good for qualitative evaluation, if that. Not sure what value will come of this if the full OPC models (or at least some simplified model calibrated to a wafer fab process) are not being employed. This is why only the wafer fabs will be interested in such simulation.
September 22nd, 2011 at 10:22 pm
In the formal announcement, DNP was quoted as supporting the concept of interactive mask-wafer double simulation. Add in the comments above from Toppan and I think you have two major mask makers that see value in this type of technology. But I can certainly see how wafer fabs would find this of interest as well.