Applied Kicks Off Clustered High-k Competition
By David Lammers
Applied Materials announced an integrated high-k gate solution for the 22nm node and beyond, arguing that keeping the gate dielectric deposition steps under vacuum will result in higher mobility and less Vt variation.
ASM International, the market leader in atomic layer high-k deposition, said its customers prefer a non-integrated tool for the time being for throughput reasons, though that could change at the 14nm and beyond.
Centura Integrated Gate Stack (Source: Applied Materials)
Applied introduced its Centura Integrated Gate Stack technology at Semicon West. Steve Ghanayem, general manager of the metal deposition, front end and ALD products division, said the system incorporates four main steps: deposition of an SiO2 monolayer, the ALD deposition of the high-k dielectric, nitridation, and annealing. “By keeping these steps under vacuum, sequentially, we can achieve a near-perfect gate stack,” Ghanayem said at Semicon West.
Applied executives emphasized the interface layer, rather than the ALD creation of the hafnium oxide layer.
At the 45nm generation the interface to the channel was relatively less important, but at the 22nm node the interface layer can account for roughly 50 percent of the atoms in the gate dielectric.
“If we do not integrate these steps, the dielectrics are exposed to the atmosphere. The interface can react with oxygen, and there can be carbon contamination as well,” he said. By going to a clustered approach under vacuum, “the gate layer is unfouled by atmospheric contaminants,” Ghanayem said.
Applied claims that exposing the gate stack to “air breaks” can result in a 5-10 percent degradation of the peak mobility, as well as impacting the variability of the threshold voltage. At the leading-edge nodes, device makers must achieve “a very narrow distribution of the threshold voltage, and exposure to the contaminants in the atmosphere can broaden that variation quite a bit,” Ghanayem said.
Balaji Chandrasekaran, a strategic marketing manager at Applied, said Applied’s customers have started to move to transistors which require ALD for the high-k deposition. “But we are not characterizing this as an ALD tool. We are putting ALD into a cluster tool.”
ASM Readying Cluster Tool
Bob Hollands, marketing manager at ASM International, said the idea of a clustered gate stack tool “is certainly not new.” ASM brought together the main high-k steps in 2007, in what was then known as the “Polygon” cluster tool which added pre-clean and nitridation steps to the ALD process.
However, over the last few years ASM’s customers came to prefer a tool with multiple ALD chambers, keeping the other steps, such as the interface growth step, separate.
Hollands said ASM’s customers believe ASM delivers a better high-k layer with its ALD chemistry. Because of its “superior ALD technology,” ASM has more than 500 Pulsar tools in the field, he said.
Mohith Verghese, technical product manager at ASM, said customers want to avoid bottlenecks when individual tools are taken down for maintenance or repairs.
“When customers integrate processes, there are difficulties in the logistics. When one of those modules goes down for maintenance or other issues, they have just lost their entire flow. They cannot easily re-route to other tools. Then they have to populate their fabs with more equipment,” Verghese said.
For the 28nm and 22nm generations, ASM’s customers control contamination with degassing and other stand-alone techniques, he added, which work well at the 28nm and 22nm nodes.
However, at the 14nm generation companies are studying whether a clustered approach might have contamination-control benefits. “Everyone is looking. Our customers are studying to see whether there is a benefit to integrated processing. If they can maintain as unit process steps, they would like to continue” at the 14nm node, he said.
“It is getting hard to control these interfaces,” Verghese acknowledged. “For 14nm and beyond, our customers are looking at clustered solutions,” he said. ASM is working with the R&D labs of the leading semiconductor companies, introducing a version of the Pulsar XP platform which integrates the ALD step with nitridation, cleaning, and, in some cases, metal gate deposition.
“Through 22nm, we don’t see it (the clustered approach) happening. Those flows are locked down,” he said.
Dean Freeman, a Gartner semiconductor manufacturing analyst, said Applied quickly gained market share in the oxynitride gate dielectric field with its clustered approach, which included an “excellent surface preparation” technology that appealed to both logic and DRAM customers and resulted in a roughly $400 million business for Applied Materials.
Applied could do the same in high-k if ASM falters, he said. And Freeman noted that Tokyo Electron Ltd. (TEL) also is developing a high-k deposition tool “that they aren’t talking about much just yet.” However, he said ASM currently has “a 90 to one hundred percent market share in high-k deposition now” due to the quality of its high-k layer.
Applied may have “some merit in its arguments that a clustered approach is necessary to keep the moisture out and to keep it clean. But at this instant, I haven’t heard any companies say that is a major issue,” Freeman said.
Tags: Applied Materials, ASM International, high-k