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Not Your Father’s DFM

By John Blyler

Historically, the design-for-manufacturing (DFM) approach had two goals. One was to ensure that a given design actually could be manufactured. The second goal was to determine how much yield improvement could be achieved with a given tool. But the costs to quantify the improvements in yield with actual data were too high to justify the effort.

The problem is exacerbated as you go below 40nm. Semiconductor fabs will not customize their manufacturing process to a customer specific design style—save for a few large customers like Apple. Instead, fabs have normalized their process activities to serve the greatest number of chip customers and different markets.

But the fabless companies are not without resources. Many have a great deal of data that is returned with their test and production wafers after the first few tapeouts. While chip companies may have 30 to 40 tapes or more for a specific process node, the first several tapeouts typically provide data from tens of thousands of test and probe wafers per month. This is valuable data that could be fed back to designers to optimize yields in the next series of tapeouts.

“The EDA industry does not provide a mechanism or system to re-simulate a fix (adjusting line spacing, for example) to see its impact on future designs,” notes Michael Buehler, marketing director for the Design-to-Silicon Division at Mentor Graphics. “Today, we focus the problem design by design, as opposed to looking holistically at a family of designs coming up.”

In the past, there was far less sensitivity to individual design features. Any problems that arose were fixed in the manufacturing process. At today’s advanced nodes, specific designs can create systematic failures that cannot be efficiently fixed by tweaking the process. Further, few fabs will want to re-center their production operation to fix one customer’s problems when it means that the rest of the customer base must change its manufacturing rules.

This idea of a feedback mechanism within the manufacturing process for a given family of chips at a given node is not new. But neither does it fit into the traditional DFM mindset.
What should this optimized process based on incremental feedback be called? Some have suggested Design for Intelligent Manufacturing. While descriptive enough, the acronym is something of a problem—DIM. Others players tout the name, Design Manufacturing Co-Optimization, which highlights the collaborative nature of the approach.

Collaboration is indeed critical. This process is affected by everybody who impacts the yield, which includes the entire ecosystem. What was a traditional DFM tool path now becomes an information flow between the tools in design, place and route, production and test. The results are fed back into the tools flow, simulated, optimized and used to tweak the next tapeout. The fix, say to a line spacing margin that turns out to be too tight, could happen a number of different ways—in the manufacturing fabrication, with a change to the test or the router, or even with the IP.

This feedback and optimization process goes way beyond what was typically thought of as DFM. Few disagree on this point. About the only thing open for debate is what this new approach should be called.



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