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Archive for March, 2014

CD-SEM Sees Beyond Less Than 10 Nanometer Nodes

Monday, March 31st, 2014

By Ofer Adan

At the recent SPIE Advanced Lithography conference, my keynote presentation focused on how improvements in metrology, multi-patterning techniques and materials can enable 3D memory and the critical dimension (CD) scaling of device designs to sub-10nm nodes. At these nodes, the growing complexity of designs make it extremely challenging for current photolithography tools to create viable patterns. And further complicating patterning and metrology is 3D integration, which has contributed to the steady growth in the number of parameters to measure and control.

For years, a CD scanning electron microscope, or CD-SEM, has been used to take measurements by sending out an electron beam that interacts with the material being scanned, and then sends back signals, which are mapped by the equipment. Today, there are serious questions about what happens at sub-10nm where the CD-SEM or any other metrology equipment must account for many more film layers, higher aspect ratios, narrower pitches and the contours and shapes of 3D architectures.

To answer skeptics and underscore improvements being made to CD-SEM, it would be helpful to highlight some key challenges and results presented that demonstrate the extendability of this metrology technology. Examples include logic vias, overlay complexity, and extremely high aspect ratio (HAR) memory contacts.

Figure 1 represents the challenge of measuring and monitoring via-in-trench bottom CD and alignment. As the diagram shows, the via edges and its placement must be precise to ensure proper connections between underlying and overlaying metal layers. The via on the right does not align with the copper line below it, which will affect conductivity between layers. The SEM images in the bottom show the difference between vias that are off-set and aligned. Both critical image sets were achieved using backscattered electron (BSE) imaging, which is becoming a viable technique for metrology. This case demonstrates using CD-SEM remains effective as a metrology and alignment technology in this complex, multi-step process.

Spotting problems with via alignment at sub-10nm cannot be done without improvements such as increasing SEM resolution as current CD-SEM technologies are not precise enough. Today with new developments we’re starting to use thousands of kilovolts to “see through” to the lowest layers since it is necessary to align down through the BARC (bottom anti-reflective coating), through the hardmask and to the metal, the contact or the Fin. Figure 2 shows the higher resolution image capabilities advanced CD-SEM can provide while seeing through materials in comparison to ordinary SEM.

Figure 3 shows in the top SEM image how properly etched deep contact holes pass completely through the material, while the ones pictured below it don’t and would need to be corrected before deposition. This result of being able to image the HAR contact holes was achieved using improved detection and collection techniques. Through a combination of employing BSE signals and enhanced filtering of signals to only those electrons that hit the surface of the bottom and come back up, it’s possible to image the bottom and fidelity of HAR holes.

Finally, in my keynote I also referenced work presented by colleagues during the conference on FinFET*, and Silicon Nanowire 3D** metrology. All these topics share a common theme of a transition from lithography limited 2D scaling to metrology and materials enabled 3D patterning.

Fortunately, advances in metrology are addressing major scaling issues. For sub-10nm structures and 3D memory, optimized, better SEMs with sharper focus, more sophisticated image and data acquisition methods and shape-sensitive, physics-based modeling and simulation are required. The future also requires using a combination of different metrology technologies including CD-SEM, CD atomic force microscopy (AFM), and transmission electron microscopy (TEM).

* X. Zhang, et al., Addressing FinFET challenges in 1Xnode by image-based 3D metrology using CD-SEM tilt beam, SPIE 2014.

** S. Levi, et al., CD-SEM AFM hybrid metrology for the characterization of gate-all-around silicon nanowires, SPIE 2014.

The Service Model Evolution

Friday, March 28th, 2014

By Charlie Pappis, group vice president and general manager of Applied Global Services (AGS)

The growing complexity of manufacturing chips, displays and solar cells together with higher investment costs of advanced production facilities are changing service and support requirements.

The service business is still driven by the need to keep systems up and running: identifying mechanical problems, adjusting hardware, replacing parts, etc. However, today’s semiconductor fabs are also under increasing pressure to accelerate and maximize yield, reduce cost and improve productivity. Active fault detection and excursion control on every module is becoming increasingly vital to deliver factory output requirements.

In this blog post, I discuss Applied Global Services’ (AGS) service model which plays a vital role in meeting today’s rigorous manufacturing requirements, helping to move the industry forward.

Leading edge semiconductor fabs require increasingly sophisticated service support techniques to manufacture complex new architectures like FinFET and 3D NAND structures. These designs involve new precision materials, more process steps, much narrower process windows, and many more interacting variables. However, legacy fabs are also under new pressure to manufacture a broader variety of devices such as analog and power chips, image sensors, and MEMS needed to support the move to enhanced mobility, the Internet of Things (IoT), and increased automobile safety standards – to name a few.  Meeting performance and yield goals for these devices requires state-of-the-art service technologies, advanced service expertise with deep tool knowledge, and an unprecedented level of collaboration and trust between the supplier and the customer.

Increasingly, fab managers rely on advanced technology to detect, classify, diagnose, control and predict various failure modes that can impact on-wafer results – and also impact cost and productivity. Today’s advanced capabilities monitor and fine-tune processes for optimum performance, and help customers move to more predictive operations. These technology-enabled process controls may include data mining analysis, active fault detection and classification (FDC), run-to-run control and statistical process control technologies.

These monitoring systems generate an enormous amount of process- and equipment-related data, driving the need for sophisticated analytics and data mining software to rapidly distill data and turn it into actionable information. This practical intelligence makes it possible to shorten development time, minimize process variations for higher yield and diagnosis root-cause for accurate corrective action. By turning this veritable ‘flood’ of data into usable information, critical correlations can be determined among the data and move semiconductor manufacturing towards a more predictive analytics. This approach minimizes unscheduled tool downtime for specific, tracked issues; saving cost and improving productivity.

To help customers achieve such productivity and yield improvements, service technologies and solutions have evolved significantly. For example, in the case of CMP scratches, Applied leveraged advanced analytics to predict and prevent scratch events, driving significant yield improvements. And with new techniques in large scale metrology data mining, Applied can help process engineers streamline their work. By reducing the time for some investigative tasks by as much as 80%, data mining allows engineers to pinpoint problems more quickly and focus on developing and deploying solutions.

These innovations are opening doors to Applied’s new service model that extends beyond traditional equipment maintenance practices. Service levels today and going forward must address increased semiconductor process complexity by taking advantage of the information gained through these new methodologies to better serve customers.

Enabling Wearable Electronics in the Internet of Things (IoT) Era

Monday, March 17th, 2014

By Bharat Ramakrishnan

As part of its growth focus for Applied Materials, the Office of the CTO (Chief Technology Officer) aims to do the following:

  • Identify, incubate and commercialize growth opportunities in new and adjacent markets
  • Build a culture of open innovation at Applied Materials
  • Address market inflections and high value problems through differentiated solutions
  • Shape the future of our growth markets worldwide

The Internet-of-Things (IoT), the concept of connecting physical objects to each other and to the internet through sensors within or attached to the objects, is a key market inflection that is opening up new opportunities and ways of obtaining information. Cisco Systems estimates there will be 50 billion connected devices by 2020—creating a tidal wave of data! Wearable Computing or “wearables” is a small but rapidly growing segment within the IoT space and is one of the potential killer applications that could fuel IoT.

Last year was significant for wearables. Google began shipping its Glass™ wearable computing device in early 2013, Pebble Technology reported receiving 275,000 orders for its smart watch by mid-year, and the Samsung® Galaxy Gear™ and Qualcomm® Toq™ watches were also released. In 2014, CES, the largest consumer electronics show, kicked-off with a huge emphasis on wearables. Several products were introduced at the show by Panasonic, LG and others. On the chip side, Intel introduced the Intel® Edison development board, a miniature computer in the form factor of an SD card and built on a low-power 22nm Quark processor. The Edison board is targeted at IoT applications, validating the semiconductor industry’s commitment to wearable computing and related devices.

At the recent Wearable Technologies conference in Munich, analysts from ABI Research reported that 50 million wearable units, including activity monitors and smart watches, were shipped in 2013. The firm stated that approximately 90 million units are forecast to ship this year – a dramatic 80% year-over-year increase, which is just the beginning of a projected sustained growth cycle for this segment of consumer electronics. Several Applied Materials customers showcased products that form the ecosystem of the wearables industry at the conference, including memory, low power microprocessors, Bluetooth® chips and MEMS sensors. Applied Materials and the Office of the CTO are contributing to the growth of the wearables market inflection through differentiated solutions.

One of the reasons wearables are expected to become mainstream is the rapid reduction in manufacturing costs. This is where Applied Materials and our expertise in precision materials engineering comes in and plays an important role. We have constantly innovated and worked closely with memory, microprocessor and MEMS customers to deliver differentiated equipment that helps accelerate their product introductions and enable rapid reductions in cost structures.

One key part of the wearables ecosystem that is still in need of new innovations is the battery. Two of the biggest challenges to overcome are the thick form factor due to battery size, and the lack of adequate battery life, thus requiring frequent recharging.

At the same Wearable Technologies conference, Applied’s Leo Kwak, Distinguished Member of Technical Staff, Office of the CTO, gave a presentation on solid state thin film batteries for wearable products. Kwak’s presentation focused on Applied’s work in solid state thin film battery technology, which aims to help solve those two biggest challenges.  Applied’s technology allows wearable products to either be thinner or to pack more battery capacity in the same space, thereby increasing battery life.

There were numerous other products introduced at this conference including prescription glasses for Google Glass by Rochester Optical and my favorite, a touchless Gesture Interface by Microchip Technology, which replaces the need for a clicker to advance presentation slides with a gesture-controlled interface.

I’m excited about all the cool functionalities wearables will make possible in 2014 and beyond. Wearables are clearly taking off and the year has only just begun! Let me know your thoughts on wearables and some of the cool devices you’ve seen in the market.

Engaging Research Institutions to Drive Innovation

Thursday, March 6th, 2014

By Nag Patibandla, Ph.D.

The concept of Open Innovation begins with the notion that companies can and should use a combination of internal and external ideas and paths to market as a strategy to advance their technology. Applied Materials firmly believes in this principle. As part of the company’s mission to accelerate innovation and incubate new growth opportunities, the Office of the CTO recently hosted its first collaboration workshop at Lawrence Berkeley Lab. Berkeley Lab is a U.S. Department of Energy (DOE) national laboratory established to address the world’s most urgent scientific challenges by advancing sustainable energy, protecting human health and creating new materials, among other research.

The half-day workshop assembled experts to discuss challenges and identify opportunities for collaboration in semiconductor manufacturing including EUV lithography, advanced etch techniques, compound semiconductors, energy storage and materials engineering.

As an incubator for ideas and innovations, Berkeley Lab is synonymous with “excellence” in the world of science. The relationship we’ve established with Lawrence Berkeley Lab, a world class institution, paves the way to new sources of innovation, incredibly brilliant people and core strengths for addressing new and adjacent markets using precision materials engineering.

Distinguished presenters from Berkeley Lab at the workshop included:

  • Don DePaolo, Associate Lab director for Energy Sciences
  • Venkat Srinivasan, head of the Energy Storage and Distributed Resources Department
  • Steve Kevan, deputy director for Science, Advanced Light Source
  • Kristin Persson, founder of the Materials Project
  • Patrick Naulleau, director, Center for X-Ray Optics
  • Jeff Neaton, director, Molecular Foundry
  • Frank Ogletree, Molecular Foundry staff scientist
  • Deirdre Olynick, Molecular Foundry staff scientist, Nanofabrication Facility
  • Gao Liu, Electrochemical Technologies staff scientist

DePaolo commented on the significance of the workshop stating, “Today we made great progress linking the materials research and facilities at Berkeley Lab with a global leader in precision materials engineering. This is the beginning of a long and productive partnership.”

The workshop attendees identified several areas of collaboration going forward, including combinatorial chemistry methods for materials innovations and leveraging the Lab’s advanced x-ray and imaging technologies.  Berkeley Lab technologists have also been invited to attend the upcoming Combinatorial Chemistry Workshop at Applied’s office in May.

More than 30 employees from the Office of the CTO attended the event on January 28 in Berkeley, CA. This and future workshops are significant as they strengthen Applied’s relationships with top research institutions, provide an opportunity to collaborate on cutting-edge technology and directly connect employees with top researchers from around the world.